#ifdef __18F4550_H
#pragma config 	PLLDIV 	= 3 			// Divide by 3 (12MHz input)
#pragma config 	CPUDIV 	= OSC1_PLL2 	// [OSC1/OSC2 Src: /1][96MHz PLL Src: /2]
#pragma config 	USBDIV 	= 2 			// Clock source from 96MHz PLL/2
#pragma config 	FOSC 	= HSPLL_HS 		// HS oscillator, PLL enabled, HS used by USB
#pragma config 	FCMEM 	= OFF 			// Fail Safe Clock Monitor
#pragma config 	VREGEN 	= ON 			// USB Voltage Regulator
#pragma config 	IESO   	= OFF 			// Internal/External Switch Over
#pragma config 	PWRT   	= ON 			// Power Up Timer
#pragma config 	BOR   	= OFF 			// Brown Out Reset
#pragma config 	BORV  	= 21			// Brown Out Voltage
#pragma config 	WDT   	= OFF 			// Watchdog Timer
#pragma config 	WDTPS 	= 32768			// 1:32768
#pragma config 	MCLRE 	= OFF			// MCLR Enable
#pragma config 	LPT1OSC = OFF			// Low Power Timer1 Oscillator Enable
#pragma config 	PBADEN 	= OFF			// Port B A/D Enable: PortB<4:0> pins are configured as digital I/O on RESET
#pragma config 	CCP2MX 	= OFF			// CCP2 Mux bit
#pragma config 	STVREN 	= OFF			// Stack Overflow Reset
#pragma config 	LVP 	= OFF			// Low Voltage ICSP:
#pragma config 	ICPRT 	= OFF			// Dedicated In-Circuit Debug/Programming Enable
#pragma config 	XINST 	= OFF			// Extended Instruction Set Enable
#pragma config 	DEBUG 	= OFF			// Background Debugger Enable

#pragma config 	CP0 	= OFF 			//Code Protection Block 0
#pragma config 	CP1 	= OFF 			//Code Protection Block 1
#pragma config 	CP2 	= OFF 			//Code Protection Block 2
#pragma config 	CP3 	= OFF 			//Code Protection Block 3
#pragma config 	CPB 	= OFF 			//Boot Block Code Protection
#pragma config 	CPD 	= OFF  			//Data EEPROM Code Protection:
#pragma config  WRT0 	= OFF			// Write Protection Block 0:
#pragma config  WRT1 	= OFF			//Write Protection Block 1:
#pragma config  WRT2 	= OFF			//Write Protection Block 2:
#pragma config  WRT3 	= OFF			//Write Protection Block 3:
#pragma config  WRTB 	= OFF			//Boot Block Write Protection:
#pragma config  WRTC 	= OFF			//Configuration Register Write Protection:
#pragma config  WRTD 	= OFF			//Data EEPROM Write Protection:
#pragma config  EBTR0 	= OFF			//Table Read Protection Block 0:
#pragma config  EBTR1 	= OFF			//Table Read Protection Block 1:
#pragma config  EBTR2 	= OFF			//Table Read Protection Block 2:
#pragma config  EBTR3 	= OFF			//Table Read Protection Block 3:
#pragma config  EBTRB 	= OFF			//Boot Block Table Read Protection:
//#pragma config  //

#endif