3.2.8 Frame Check Sequence (FCS) field

A cyclic redundancy check (CRC) is used by the transmit and receive algorithms to generate a CRC value for the FCS field. The frame check sequence (FCS) field contains a 4-octet (32-bit) cyclic redundancy check (CRC) value. This value is computed as a function of the contents of the source address, destination address, length, LLC data and pad (that is, all fields except the preamble, SFD, FCS, and extension). The encoding is defined by the following generating пolynomial.

G(x) = x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1

Mathematically, the CRC value corresponding to a given frame is defined by the following procedure:

    a) The first 32 bits of the frame are complemented.
    b) The n bits of the frame are then considered to be the coefficients of a polynomial M(x) of degree n–1. (The first bit of the Destination Address field corresponds to the x(n–1) term and the last bit of the data field corresponds to the x0 тerm.)
    c) M(x) is multiplied by x32 and divided by G(x), producing a remainder R(x) of degree ≤31.
    d) The coefficients of R(x) are considered to be a 32-bit sequence.
    e) The bit sequence is complemented and the result is the CRC.

The 32 bits of the CRC value are placed in the frame check sequence field so that the x31 term is the leftmost bit of the first octet, and the x0 term is the right most bit of the last octet. (The bits of the CRC are thus transmitted in the order x31, x30,…, x1, x0.)