#include <xc.h>
#include <libpic30.h>
#include "config.h"

#define CLK 8000000L //8MHZ
#define FCY (CLK/2)

volatile struct {
    unsigned BIT0:   1;
    unsigned BIT1:   1;
    unsigned BIT2:   1;
    unsigned BIT3:   1;
    unsigned BIT4:   1;
}port_a;

void uart_setup(void);
void uart1putchar(char ch);
char uart1getchar();

int main (int argc, char * argv[])
{
    //oscillator confuguration
    OSCCONbits.COSC = 0;            //8MHz FRC Oscillator

    //set all I/O digital
    AD1PCFG = 0xFFFF;

    //configure port a
    TRISA = 0b110011;
    //TMR1 configuration
    T1CONbits.TCS = 0;              //internal clock selected
    T1CONbits.TGATE = 0;            //gate disabled
    T1CONbits.TCKPS = 2;            //prescaler 1:64

    //TMR1 interrupt configuration
    TMR1 = 0;                       //clear timer
    PR1 = 62500 + 3;                //Load the Period Register with the value to cause overflow
    _T1IF = 0;                      //clear flag
    IPC0bits.T1IP = 4;              //higher level interrupt
    IEC0bits.T1IE = 1;              //enable interrupt
    T1CONbits.TON = 1;              //start the timer

    uart_setup();
    unsigned char temp = 0;

    while (1)
    {
        //temp = uart1getchar();
        //uart1putchar(temp);
    }

   return 0;
}

void _ISR _T1Interrupt( void)
{
    PORTAbits.RA2 ^= 1;
    _T1IF = 0;                      //clear flag
} //T1Interrupt

void uart_setup(void)
{
    U1BRG = 25;                     //Baud rate set to 9600
    IPC2bits.U1RXIP = 4;            //interrupt priority level for receive
    IPC3bits.U1TXIP = 4;            //interrupt ptiority level for transmit
    U1STA = 0;

    U1MODE = 0;                     //8-bit data, no parity, 1 stop bit
    U1MODEbits.UARTEN = 1;          //enable the module
   
    U1STAbits.UTXISEL0 = 0;
    U1STAbits.UTXISEL1 = 1;         //interrupt generated transmit is complete
    IFS0bits.U1RXIF = 0;            //clear receive interrupt flag

    U1STAbits.UTXEN = 1;            //enable transmission
    IEC0bits.U1RXIE = 1;            //UART receiver interrupt enabled
    IEC0bits.U1TXIE = 1;            //UART transmitter interrupt enabled
}

void uart1putchar(char ch)
{
    while(U1STAbits.UTXBF);         //transmit only if TX buffer is empty
    U1TXREG = ch;
}

char uart1getchar()
{
    char temp;
    while(IFS0bits.U1RXIF == 0);    //wait for the buffer to fill up
    temp = U1RXREG;                 //copy char
    IFS0bits.U1RXIF = 0;            //reset interrupt
    return temp;                    //return received char
}

// FGS
#pragma config GWRP = OFF               // General Segment Code Flash Write Protection bit (General segment may be written)
#pragma config GCP = OFF                // General Segment Code Flash Code Protection bit (No protection)

// FOSCSEL
#pragma config FNOSC = FRC              // Oscillator Select (Fast RC oscillator (FRC))
#pragma config IESO = ON                // Internal External Switch Over bit (Internal External Switchover mode enabled (Two-Speed Start-up enabled))

// FOSC
#pragma config POSCMOD = NONE           // Primary Oscillator Configuration bits (Primary oscillator disabled)
#pragma config OSCIOFNC = ON            // CLKO Enable Configuration bit (CLKO output disabled)
#pragma config POSCFREQ = HS            // Primary Oscillator Frequency Range Configuration bits (Primary oscillator/external clock input frequency greater than 8 MHz)
#pragma config SOSCSEL = SOSCHP         // SOSC Power Selection Configuration bits (Secondary oscillator configured for high-power operation)
#pragma config FCKSM = CSDCMD           // Clock Switching and Monitor Selection (Clock switching is disabled, Fail-Safe Clock Monitor is disabled)

// FWDT
#pragma config WDTPS = PS32768          // Watchdog Timer Postscale Select bits (1:32,768)
#pragma config FWPSA = PR128            // WDT Prescaler (WDT prescaler ratio of 1:128)
#pragma config WINDIS = OFF             // Windowed Watchdog Timer Disable bit (Standard WDT selected; windowed WDT disabled)
#pragma config FWDTEN = ON              // Watchdog Timer Enable bit (WDT enabled)

#pragma config MCLRE = ON               // MCLR Pin Enable bit (MCLR pin enabled; RA5 input pin disabled)

// FICD
#pragma config ICS = PGx2               // Reserved (PGC2/PGD2 are used for programming the device)